1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device and more particularly, to a semiconductor integrated circuit device with an electrode for measuring the capacitance of an interlayer insulator film.
2. Description of the Prior Art
Recently, with conventional semiconductor integrated circuit devices such as one customized using a gate array and one designed by the standard cell method, the integration scale of electronic elements has been increasing and at the same time, density of wirings or interconnections has becoming higher. As a result, the capacitance between wiring or conductor layers has been largely affecting the transmission delay of a signal transmitted through the conductor layers, which requires precision management or control of the thickness and quality of an interlayer insulator film disposed between the conductor layers.
An example of the conventional semiconductor integrated circuit devices of this type is shown in part in FIG. 1, which is disclosed in the Japanese Patent Publication No. 2-296348 (December, 1990).
A semiconductor wafer W has repeated chips thereon, each of which contains an effective area 18 where specified integrated circuits are provided and scribe areas 19 for defining or isolating the effective area 18.
At the periphery of the effective area 18 of the chip, a field oxide film 22 is selectively formed on the substrate to form active regions therein, and a polysilicon film is selectively formed on the field oxide film 22 to produce wiring conductors 13a and 13b with approximately square shapes on the field oxide film 22. The wiring conductor 13a is extending in part to the corresponding scribe area 19 to form an electrode 23a for capacitance measurement. The wiring conductors 13a and 13b are covered with a first interlayer insulator film (not shown) in the effective area 18.
On the first interlayer insulator film, a metal film is selectively formed to produce wiring conductors 15a and 15b with approximately square shapes, which are smaller in size than the wiring conductors 13a and 13b. The wiring conductors 15a and 15b are extending in part to the corresponding scribe area 19 to form electrodes 23b and 23c for capacitance measurement, respectively. The wiring conductors 15a and 15b are covered with a second interlayer insulator film (not shown) in the effective area 18.
On the second interlayer insulator film, a metal film is selectively formed to produce bonding pads 17a and 17b with approximately square shapes, which are smaller in size than the wiring conductors 15a and 15b and are electrically connected to internal circuits (not shown) provided in the effective area 18. The bonding pads 17a and 17b are electrically connected to the wiring conductors 15a and 15b through contact holes provided in the second interlayer insulator film (not shown), respectively.
When probe needles of a capacitance measurement system are contacted with the electrodes 23a and 23b, respectively, the capacitance of the first interlayer insulator film can be measured. Similarly, when the probe needle is contacted with the electrode 23c and the bonding pad 17b, the capacitance of the second interlayer insulator film can be measured.
The measurement results thus obtained are utilized for precision managing or controlling the thickness and quality of the first or second interlayer insulator films.
Another example of the conventional semiconductor integrated circuit devices of this type is shown in part in FIG. 2.
As shown in FIG. 2, a first insulator film 33a is formed on a semiconductor substrate 21 and a first wiring layer 31 made of polysilicon is formed on the first insulator film 33a. The first wiring layer 31 is covered with a second insulator film 33b.
A second wiring layer 32 made of polysilicon and a conductor layer 35 are formed on the second insulator film 33b. The second wiring layer 32 and the conductor layer 35 are covered with a third insulator film 33c.
Third and fourth wiring layers 34 and 37 made of metal are formed on the third insulator film 33c. The third wiring layer 34 is contacted with the first polysilicon wiring layer 31 through contact holes provided in the second and third insulator films 33b and 33c. The fourth wiring layer 37 is contacted with the second polysilicon wiring layer 32 through a contact hole provided in the third insulator film 33c. The third and fourth wiring layers 34 and 37 are covered with a fourth insulator film 33d.
When probe needles of a capacitance measurement system are contacted with the third and fourth wiring layers 34 and 37, respectively while changing the voltage applied to the third conductor layer 34 and keeping the electric potential of the conductor layer 35 constant, the capacitance C.sub.X of the second insulator film 33b can be measured with reduction in stray capacitance C.sub.S between the first and fourth wiring layers 31 and 37.
The measurement result is utilized for precise managing or controlling the thickness and quality of the second insulator film 33b, similar to the example in FIG. 1.
With the conventional semiconductor integrated circuit device shown in FIG. 1, the electrodes 23a, 23b and 23c for capacitance measurement are formed in the scribe area 19, i.e., outside of the internal circuit area 18, and the bonding pad 17b is used for measuring the capacitance of the second interlayer insulator film. As a result, there is an advantage that integration scale of the internal circuits is not reduced.
However, all of the electrodes 23a, 23b and 23c need to be extended from the effective area 18 to the scribe area 19 beyond a high step of 1 .mu.m or more in height. Accordingly, there arises a problem of difficulty in formation of the electrodes 23a, 23b and 23c and ease in breaking of the conductor 13a and/or the conductors 15a and 15b.
Also, with the conventional semiconductor integrated circuit device shown in FIG. 2, the second polysilicon wiring layer 32 for capacitance measurement is formed in the internal circuit area. As a result, there is a disadvantage of integration scale reduction of the internal circuits.